In recent years, differential interfaces that perform differential serial transmission have become common to achieve high-speed transmission under strict constraints with regards to the number of Large Scale Integration (LSI) terminals or to noise from Electro Magnetic Interference (EMI). The driver circuit that transmits data and the receiver circuit that receives data in such a differential interface operate with a constant current supply and therefore consume power even when valid data is not being transmitted.
To address this problem, technology is necessary to limit current flowing to some or all of the circuits when valid data is not being transmitted. Patent Literature 1 discloses a structure for achieving such technology.
FIG. 15 shows the configuration of a conventional differential interface circuit according to Patent Literature 1. In FIG. 15, a driver circuit 900 is provided with a current driven driver 901 that performs differential transmission and a voltage driven driver 902 that performs single-ended transmission. A receiver circuit 903 is provided with a current/voltage conversion circuit 904, a comparator 905, and a power control circuit 906 and is connected to the driver circuit 900 via differential signal lines D+ and D−. In the driver circuit 900, the voltage driven driver 902 outputs a power-down electric potential and a wake-up electric potential. The voltage driven driver 902 provides the receiver circuit 903 with a power-down notification and a wake-up notification. Upon receipt of the power-down notification by the receiver 903, the power control circuit 906 controls the current flowing to at least one of the current/voltage conversion circuit 904 and the comparator 905.